mirror of
https://github.com/xopenwrt/X-OpenWrt-New.git
synced 2026-09-18 08:20:11 +00:00
优化 OpenWrt-19.07 21.02 支持(by teasiu)
This commit is contained in:
Hyy2001X
@@ -0,0 +1,136 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: slitaz-cn <teasiu@163.com>
|
||||
Date: Tue, 6 Apr 2021 01:25:07 +0800
|
||||
Subject: [PATCH] add upx ucl for 19.07.7
|
||||
|
||||
Signed-off-by: slitaz-cn <teasiu@163.com>
|
||||
---
|
||||
tools/Makefile | 3 ++-
|
||||
tools/ucl/Makefile | 51 ++++++++++++++++++++++++++++++++++++++++++++++
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||||
tools/upx/Makefile | 35 +++++++++++++++++++++++++++++++
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||||
3 files changed, 88 insertions(+), 1 deletion(-)
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create mode 100644 tools/ucl/Makefile
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create mode 100644 tools/upx/Makefile
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diff --git a/tools/Makefile b/tools/Makefile
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index b8d986b80c..bcde9a720d 100644
|
||||
--- a/tools/Makefile
|
||||
+++ b/tools/Makefile
|
||||
@@ -33,7 +33,7 @@ tools-$(CONFIG_TARGET_mxs) += elftosb sdimage
|
||||
tools-$(CONFIG_TARGET_ar71xx) += lzma-old
|
||||
tools-$(CONFIG_TARGET_ar71xx)$(CONFIG_TARGET_ath79) += squashfs
|
||||
tools-$(CONFIG_USES_MINOR) += kernel2minor
|
||||
-tools-y += lzma squashfskit4 zip
|
||||
+tools-y += lzma squashfskit4 zip ucl upx
|
||||
tools-$(BUILD_B43_TOOLS) += b43-tools
|
||||
tools-$(BUILD_ISL) += isl
|
||||
tools-$(CONFIG_USE_SPARSE) += sparse
|
||||
@@ -46,6 +46,7 @@ $(curdir)/flex/compile := $(curdir)/libtool/compile
|
||||
$(curdir)/libtool/compile := $(curdir)/m4/compile $(curdir)/autoconf/compile $(curdir)/automake/compile $(curdir)/missing-macros/compile
|
||||
$(curdir)/squashfs/compile := $(curdir)/lzma-old/compile
|
||||
$(curdir)/squashfskit4/compile := $(curdir)/xz/compile $(curdir)/zlib/compile
|
||||
+$(curdir)/upx/compile := $(curdir)/ucl/compile
|
||||
$(curdir)/quilt/compile := $(curdir)/autoconf/compile $(curdir)/findutils/compile
|
||||
$(curdir)/autoconf/compile := $(curdir)/m4/compile
|
||||
$(curdir)/automake/compile := $(curdir)/m4/compile $(curdir)/autoconf/compile $(curdir)/pkg-config/compile $(curdir)/xz/compile
|
||||
diff --git a/tools/ucl/Makefile b/tools/ucl/Makefile
|
||||
new file mode 100644
|
||||
index 0000000000..9fb9aec117
|
||||
--- /dev/null
|
||||
+++ b/tools/ucl/Makefile
|
||||
@@ -0,0 +1,51 @@
|
||||
+#
|
||||
+# Copyright (C) 2019 OpenWrt.org
|
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+#
|
||||
+# This is free software, licensed under the GNU General Public License v2.
|
||||
+# See /LICENSE for more information.
|
||||
+#
|
||||
+include $(TOPDIR)/rules.mk
|
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+
|
||||
+PKG_NAME:=ucl
|
||||
+PKG_VERSION:=1.03
|
||||
+
|
||||
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
|
||||
+PKG_SOURCE_URL:=http://www.oberhumer.com/opensource/ucl/download/$(PKG_SOURCE)
|
||||
+PKG_HASH:=b865299ffd45d73412293369c9754b07637680e5c826915f097577cd27350348
|
||||
+
|
||||
+HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION)
|
||||
+
|
||||
+include $(INCLUDE_DIR)/host-build.mk
|
||||
+
|
||||
+HOSTCC :=gcc
|
||||
+HOST_CFLAGS +=-std=gnu89
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||||
+
|
||||
+define Host/Prepare
|
||||
+ $(Host/Prepare/Default)
|
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+ mkdir -p $(STAGING_DIR_HOST)/include/ucl
|
||||
+endef
|
||||
+
|
||||
+define Host/Configure
|
||||
+ (cd $(HOST_BUILD_DIR); \
|
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+ CC="$(HOSTCC)" \
|
||||
+ CFLAGS="$(HOST_CFLAGS)" \
|
||||
+ ./configure --prefix=$(STAGING_DIR_HOST) \
|
||||
+ );
|
||||
+ $(call Host/Configure/Default)
|
||||
+endef
|
||||
+
|
||||
+define Host/Compile
|
||||
+ $(MAKE) -C $(HOST_BUILD_DIR)
|
||||
+endef
|
||||
+
|
||||
+define Host/Install
|
||||
+ $(MAKE) -C $(HOST_BUILD_DIR) install
|
||||
+endef
|
||||
+
|
||||
+define Host/Clean
|
||||
+ $(MAKE) -C $(HOST_BUILD_DIR) uninstall
|
||||
+ rm -rf $(HOST_BUILD_DIR)
|
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+ rm -rf $(STAGING_DIR_HOST)/include/ucl
|
||||
+endef
|
||||
+
|
||||
+$(eval $(call HostBuild))
|
||||
diff --git a/tools/upx/Makefile b/tools/upx/Makefile
|
||||
new file mode 100644
|
||||
index 0000000000..fbf1dfbd2e
|
||||
--- /dev/null
|
||||
+++ b/tools/upx/Makefile
|
||||
@@ -0,0 +1,35 @@
|
||||
+#
|
||||
+# Copyright (C) 2011-2020 OpenWrt.org
|
||||
+#
|
||||
+# This is free software, licensed under the GNU General Public License v2.
|
||||
+# See /LICENSE for more information.
|
||||
+#
|
||||
+include $(TOPDIR)/rules.mk
|
||||
+
|
||||
+PKG_NAME:=upx
|
||||
+PKG_VERSION:=3.95
|
||||
+
|
||||
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-src.tar.xz
|
||||
+PKG_SOURCE_URL:=https://github.com/upx/upx/releases/download/v$(PKG_VERSION)
|
||||
+PKG_HASH:=3b0f55468d285c760fcf5ea865a070b27696393002712054c69ff40d8f7f5592
|
||||
+
|
||||
+HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION)-src
|
||||
+
|
||||
+include $(INCLUDE_DIR)/host-build.mk
|
||||
+
|
||||
+define Host/Compile
|
||||
+ UPX_UCLDIR=$(STAGING_DIR_HOST) \
|
||||
+ $(MAKE) -C $(HOST_BUILD_DIR)/src \
|
||||
+ CXXFLAGS_WERROR="" LDFLAGS="$(HOST_LDFLAGS)" \
|
||||
+ CXX="$(HOSTCXX)"
|
||||
+endef
|
||||
+
|
||||
+define Host/Install
|
||||
+ $(CP) $(HOST_BUILD_DIR)/src/upx.out $(STAGING_DIR_HOST)/bin/upx
|
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+endef
|
||||
+
|
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+define Host/Clean
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+ rm -f $(STAGING_DIR_HOST)/bin/upx
|
||||
+endef
|
||||
+
|
||||
+$(eval $(call HostBuild))
|
||||
--
|
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2.20.1
|
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|
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@@ -0,0 +1,136 @@
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Chuck <fanck0605@qq.com>
|
||||
Date: Mon, 13 Jul 2020 13:09:02 +0800
|
||||
Subject: [PATCH] tools: add ucl and upx compresss
|
||||
|
||||
Signed-off-by: Chuck <fanck0605@qq.com>
|
||||
---
|
||||
tools/Makefile | 3 ++-
|
||||
tools/ucl/Makefile | 51 ++++++++++++++++++++++++++++++++++++++++++++++
|
||||
tools/upx/Makefile | 35 +++++++++++++++++++++++++++++++
|
||||
3 files changed, 88 insertions(+), 1 deletion(-)
|
||||
create mode 100644 tools/ucl/Makefile
|
||||
create mode 100644 tools/upx/Makefile
|
||||
|
||||
diff --git a/tools/Makefile b/tools/Makefile
|
||||
index a2665dbc9a..6dd93f3cfe 100644
|
||||
--- a/tools/Makefile
|
||||
+++ b/tools/Makefile
|
||||
@@ -25,7 +25,7 @@ tools-y += autoconf autoconf-archive automake bc bison cmake dosfstools
|
||||
tools-y += e2fsprogs fakeroot findutils firmware-utils flex gengetopt
|
||||
tools-y += libressl libtool lzma m4 make-ext4fs missing-macros mkimage
|
||||
tools-y += mklibs mm-macros mtd-utils mtools padjffs2 patch-image
|
||||
-tools-y += patchelf pkgconf quilt squashfskit4 sstrip zip zlib zstd
|
||||
+tools-y += patchelf pkgconf quilt squashfskit4 sstrip ucl upx zip zlib zstd
|
||||
tools-$(BUILD_B43_TOOLS) += b43-tools
|
||||
tools-$(BUILD_ISL) += isl
|
||||
tools-$(BUILD_TOOLCHAIN) += expat gmp libelf mpc mpfr
|
||||
@@ -71,6 +71,7 @@ $(curdir)/quilt/compile := $(curdir)/autoconf/compile $(curdir)/findutils/compil
|
||||
$(curdir)/sdcc/compile := $(curdir)/bison/compile
|
||||
$(curdir)/squashfs/compile := $(curdir)/lzma-old/compile
|
||||
$(curdir)/squashfskit4/compile := $(curdir)/xz/compile $(curdir)/zlib/compile
|
||||
+$(curdir)/upx/compile := $(curdir)/ucl/compile
|
||||
$(curdir)/zlib/compile := $(curdir)/cmake/compile
|
||||
$(curdir)/zstd/compile := $(curdir)/cmake/compile
|
||||
|
||||
diff --git a/tools/ucl/Makefile b/tools/ucl/Makefile
|
||||
new file mode 100644
|
||||
index 0000000000..9fb9aec117
|
||||
--- /dev/null
|
||||
+++ b/tools/ucl/Makefile
|
||||
@@ -0,0 +1,51 @@
|
||||
+#
|
||||
+# Copyright (C) 2019 OpenWrt.org
|
||||
+#
|
||||
+# This is free software, licensed under the GNU General Public License v2.
|
||||
+# See /LICENSE for more information.
|
||||
+#
|
||||
+include $(TOPDIR)/rules.mk
|
||||
+
|
||||
+PKG_NAME:=ucl
|
||||
+PKG_VERSION:=1.03
|
||||
+
|
||||
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
|
||||
+PKG_SOURCE_URL:=http://www.oberhumer.com/opensource/ucl/download/$(PKG_SOURCE)
|
||||
+PKG_HASH:=b865299ffd45d73412293369c9754b07637680e5c826915f097577cd27350348
|
||||
+
|
||||
+HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION)
|
||||
+
|
||||
+include $(INCLUDE_DIR)/host-build.mk
|
||||
+
|
||||
+HOSTCC :=gcc
|
||||
+HOST_CFLAGS +=-std=gnu89
|
||||
+
|
||||
+define Host/Prepare
|
||||
+ $(Host/Prepare/Default)
|
||||
+ mkdir -p $(STAGING_DIR_HOST)/include/ucl
|
||||
+endef
|
||||
+
|
||||
+define Host/Configure
|
||||
+ (cd $(HOST_BUILD_DIR); \
|
||||
+ CC="$(HOSTCC)" \
|
||||
+ CFLAGS="$(HOST_CFLAGS)" \
|
||||
+ ./configure --prefix=$(STAGING_DIR_HOST) \
|
||||
+ );
|
||||
+ $(call Host/Configure/Default)
|
||||
+endef
|
||||
+
|
||||
+define Host/Compile
|
||||
+ $(MAKE) -C $(HOST_BUILD_DIR)
|
||||
+endef
|
||||
+
|
||||
+define Host/Install
|
||||
+ $(MAKE) -C $(HOST_BUILD_DIR) install
|
||||
+endef
|
||||
+
|
||||
+define Host/Clean
|
||||
+ $(MAKE) -C $(HOST_BUILD_DIR) uninstall
|
||||
+ rm -rf $(HOST_BUILD_DIR)
|
||||
+ rm -rf $(STAGING_DIR_HOST)/include/ucl
|
||||
+endef
|
||||
+
|
||||
+$(eval $(call HostBuild))
|
||||
diff --git a/tools/upx/Makefile b/tools/upx/Makefile
|
||||
new file mode 100644
|
||||
index 0000000000..fbf1dfbd2e
|
||||
--- /dev/null
|
||||
+++ b/tools/upx/Makefile
|
||||
@@ -0,0 +1,35 @@
|
||||
+#
|
||||
+# Copyright (C) 2011-2020 OpenWrt.org
|
||||
+#
|
||||
+# This is free software, licensed under the GNU General Public License v2.
|
||||
+# See /LICENSE for more information.
|
||||
+#
|
||||
+include $(TOPDIR)/rules.mk
|
||||
+
|
||||
+PKG_NAME:=upx
|
||||
+PKG_VERSION:=3.95
|
||||
+
|
||||
+PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-src.tar.xz
|
||||
+PKG_SOURCE_URL:=https://github.com/upx/upx/releases/download/v$(PKG_VERSION)
|
||||
+PKG_HASH:=3b0f55468d285c760fcf5ea865a070b27696393002712054c69ff40d8f7f5592
|
||||
+
|
||||
+HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/$(PKG_NAME)-$(PKG_VERSION)-src
|
||||
+
|
||||
+include $(INCLUDE_DIR)/host-build.mk
|
||||
+
|
||||
+define Host/Compile
|
||||
+ UPX_UCLDIR=$(STAGING_DIR_HOST) \
|
||||
+ $(MAKE) -C $(HOST_BUILD_DIR)/src \
|
||||
+ CXXFLAGS_WERROR="" LDFLAGS="$(HOST_LDFLAGS)" \
|
||||
+ CXX="$(HOSTCXX)"
|
||||
+endef
|
||||
+
|
||||
+define Host/Install
|
||||
+ $(CP) $(HOST_BUILD_DIR)/src/upx.out $(STAGING_DIR_HOST)/bin/upx
|
||||
+endef
|
||||
+
|
||||
+define Host/Clean
|
||||
+ rm -f $(STAGING_DIR_HOST)/bin/upx
|
||||
+endef
|
||||
+
|
||||
+$(eval $(call HostBuild))
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -0,0 +1,233 @@
|
||||
--- a/arch/mips/include/asm/mach-ralink/mt7621.h
|
||||
+++ b/arch/mips/include/asm/mach-ralink/mt7621.h
|
||||
@@ -17,6 +17,10 @@
|
||||
#define SYSC_REG_CHIP_REV 0x0c
|
||||
#define SYSC_REG_SYSTEM_CONFIG0 0x10
|
||||
#define SYSC_REG_SYSTEM_CONFIG1 0x14
|
||||
+#define SYSC_REG_CLKCFG0 0x2c
|
||||
+#define SYSC_REG_CUR_CLK_STS 0x44
|
||||
+
|
||||
+#define MEMC_REG_CPU_PLL 0x648
|
||||
|
||||
#define CHIP_REV_PKG_MASK 0x1
|
||||
#define CHIP_REV_PKG_SHIFT 16
|
||||
@@ -24,6 +28,22 @@
|
||||
#define CHIP_REV_VER_SHIFT 8
|
||||
#define CHIP_REV_ECO_MASK 0xf
|
||||
|
||||
+#define XTAL_MODE_SEL_MASK 0x7
|
||||
+#define XTAL_MODE_SEL_SHIFT 6
|
||||
+
|
||||
+#define CPU_CLK_SEL_MASK 0x3
|
||||
+#define CPU_CLK_SEL_SHIFT 30
|
||||
+
|
||||
+#define CUR_CPU_FDIV_MASK 0x1f
|
||||
+#define CUR_CPU_FDIV_SHIFT 8
|
||||
+#define CUR_CPU_FFRAC_MASK 0x1f
|
||||
+#define CUR_CPU_FFRAC_SHIFT 0
|
||||
+
|
||||
+#define CPU_PLL_PREDIV_MASK 0x3
|
||||
+#define CPU_PLL_PREDIV_SHIFT 12
|
||||
+#define CPU_PLL_FBDIV_MASK 0x7f
|
||||
+#define CPU_PLL_FBDIV_SHIFT 4
|
||||
+
|
||||
#define MT7621_DRAM_BASE 0x0
|
||||
#define MT7621_DDR2_SIZE_MIN 32
|
||||
#define MT7621_DDR2_SIZE_MAX 256
|
||||
--- a/arch/mips/ralink/mt7621.c
|
||||
+++ b/arch/mips/ralink/mt7621.c
|
||||
@@ -8,6 +8,10 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/jiffies.h>
|
||||
+#include <linux/clk.h>
|
||||
+#include <linux/clkdev.h>
|
||||
+#include <linux/clk-provider.h>
|
||||
+#include <dt-bindings/clock/mt7621-clk.h>
|
||||
|
||||
#include <asm/mipsregs.h>
|
||||
#include <asm/smp-ops.h>
|
||||
@@ -16,16 +20,12 @@
|
||||
#include <asm/mach-ralink/mt7621.h>
|
||||
#include <asm/mips-boards/launch.h>
|
||||
#include <asm/delay.h>
|
||||
+#include <asm/time.h>
|
||||
|
||||
#include <pinmux.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
-#define SYSC_REG_SYSCFG 0x10
|
||||
-#define SYSC_REG_CPLL_CLKCFG0 0x2c
|
||||
-#define SYSC_REG_CUR_CLK_STS 0x44
|
||||
-#define CPU_CLK_SEL (BIT(30) | BIT(31))
|
||||
-
|
||||
#define MT7621_GPIO_MODE_UART1 1
|
||||
#define MT7621_GPIO_MODE_I2C 2
|
||||
#define MT7621_GPIO_MODE_UART3_MASK 0x3
|
||||
@@ -111,49 +111,98 @@ static struct rt2880_pmx_group mt7621_pi
|
||||
{ 0 }
|
||||
};
|
||||
|
||||
+static struct clk *clks[MT7621_CLK_MAX];
|
||||
+static struct clk_onecell_data clk_data = {
|
||||
+ .clks = clks,
|
||||
+ .clk_num = ARRAY_SIZE(clks),
|
||||
+};
|
||||
+
|
||||
phys_addr_t mips_cpc_default_phys_base(void)
|
||||
{
|
||||
panic("Cannot detect cpc address");
|
||||
}
|
||||
|
||||
-void __init ralink_clk_init(void)
|
||||
+static struct clk *__init mt7621_add_sys_clkdev(
|
||||
+ const char *id, unsigned long rate)
|
||||
{
|
||||
- int cpu_fdiv = 0;
|
||||
- int cpu_ffrac = 0;
|
||||
- int fbdiv = 0;
|
||||
- u32 clk_sts, syscfg;
|
||||
- u8 clk_sel = 0, xtal_mode;
|
||||
- u32 cpu_clk;
|
||||
+ struct clk *clk;
|
||||
+ int err;
|
||||
+
|
||||
+ clk = clk_register_fixed_rate(NULL, id, NULL, 0, rate);
|
||||
+ if (IS_ERR(clk))
|
||||
+ panic("failed to allocate %s clock structure", id);
|
||||
+
|
||||
+ err = clk_register_clkdev(clk, id, NULL);
|
||||
+ if (err)
|
||||
+ panic("unable to register %s clock device", id);
|
||||
|
||||
- if ((rt_sysc_r32(SYSC_REG_CPLL_CLKCFG0) & CPU_CLK_SEL) != 0)
|
||||
- clk_sel = 1;
|
||||
+ return clk;
|
||||
+}
|
||||
+
|
||||
+void __init ralink_clk_init(void)
|
||||
+{
|
||||
+ u32 syscfg, xtal_sel, clkcfg, clk_sel, curclk, ffiv, ffrac;
|
||||
+ u32 pll, prediv, fbdiv;
|
||||
+ u32 xtal_clk, cpu_clk, bus_clk;
|
||||
+ const static u32 prediv_tbl[] = {0, 1, 2, 2};
|
||||
+
|
||||
+ syscfg = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG0);
|
||||
+ xtal_sel = (syscfg >> XTAL_MODE_SEL_SHIFT) & XTAL_MODE_SEL_MASK;
|
||||
+
|
||||
+ clkcfg = rt_sysc_r32(SYSC_REG_CLKCFG0);
|
||||
+ clk_sel = (clkcfg >> CPU_CLK_SEL_SHIFT) & CPU_CLK_SEL_MASK;
|
||||
+
|
||||
+ curclk = rt_sysc_r32(SYSC_REG_CUR_CLK_STS);
|
||||
+ ffiv = (curclk >> CUR_CPU_FDIV_SHIFT) & CUR_CPU_FDIV_MASK;
|
||||
+ ffrac = (curclk >> CUR_CPU_FFRAC_SHIFT) & CUR_CPU_FFRAC_MASK;
|
||||
+
|
||||
+ if (xtal_sel <= 2)
|
||||
+ xtal_clk = 20 * 1000 * 1000;
|
||||
+ else if (xtal_sel <= 5)
|
||||
+ xtal_clk = 40 * 1000 * 1000;
|
||||
+ else
|
||||
+ xtal_clk = 25 * 1000 * 1000;
|
||||
|
||||
switch (clk_sel) {
|
||||
case 0:
|
||||
- clk_sts = rt_sysc_r32(SYSC_REG_CUR_CLK_STS);
|
||||
- cpu_fdiv = ((clk_sts >> 8) & 0x1F);
|
||||
- cpu_ffrac = (clk_sts & 0x1F);
|
||||
- cpu_clk = (500 * cpu_ffrac / cpu_fdiv) * 1000 * 1000;
|
||||
+ cpu_clk = 500 * 1000 * 1000;
|
||||
break;
|
||||
-
|
||||
case 1:
|
||||
- fbdiv = ((rt_sysc_r32(0x648) >> 4) & 0x7F) + 1;
|
||||
- syscfg = rt_sysc_r32(SYSC_REG_SYSCFG);
|
||||
- xtal_mode = (syscfg >> 6) & 0x7;
|
||||
- if (xtal_mode >= 6) {
|
||||
- /* 25Mhz Xtal */
|
||||
- cpu_clk = 25 * fbdiv * 1000 * 1000;
|
||||
- } else if (xtal_mode >= 3) {
|
||||
- /* 40Mhz Xtal */
|
||||
- cpu_clk = 40 * fbdiv * 1000 * 1000;
|
||||
- } else {
|
||||
- /* 20Mhz Xtal */
|
||||
- cpu_clk = 20 * fbdiv * 1000 * 1000;
|
||||
- }
|
||||
+ pll = rt_memc_r32(MEMC_REG_CPU_PLL);
|
||||
+ if ((pll & 0x7f0) == 0x2b0) {
|
||||
+ volatile u32 i;
|
||||
+
|
||||
+ pr_info("CPU Clock: 880MHz, start overclocking\n");
|
||||
+ pll &= ~0x7ff;
|
||||
+ pll |= 0x312;
|
||||
+ rt_memc_w32(pll, MEMC_REG_CPU_PLL);
|
||||
+ for (i = 0; i < 1000; i++);
|
||||
+ }
|
||||
+ fbdiv = (pll >> CPU_PLL_FBDIV_SHIFT) & CPU_PLL_FBDIV_MASK;
|
||||
+ prediv = (pll >> CPU_PLL_PREDIV_SHIFT) & CPU_PLL_PREDIV_MASK;
|
||||
+ cpu_clk = ((fbdiv + 1) * xtal_clk) >> prediv_tbl[prediv];
|
||||
break;
|
||||
+ default:
|
||||
+ cpu_clk = xtal_clk;
|
||||
}
|
||||
+
|
||||
+ cpu_clk = cpu_clk / ffiv * ffrac;
|
||||
+ bus_clk = cpu_clk / 4;
|
||||
+
|
||||
+ clks[MT7621_CLK_CPU] = mt7621_add_sys_clkdev("cpu", cpu_clk);
|
||||
+ clks[MT7621_CLK_BUS] = mt7621_add_sys_clkdev("bus", bus_clk);
|
||||
+
|
||||
+ pr_info("CPU Clock: %dMHz\n", cpu_clk / 1000000);
|
||||
+ mips_hpt_frequency = cpu_clk / 2;
|
||||
}
|
||||
|
||||
+static void __init mt7621_clocks_init_dt(struct device_node *np)
|
||||
+{
|
||||
+ of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
|
||||
+}
|
||||
+
|
||||
+CLK_OF_DECLARE(ar7100, "mediatek,mt7621-pll", mt7621_clocks_init_dt);
|
||||
+
|
||||
void __init ralink_of_remap(void)
|
||||
{
|
||||
rt_sysc_membase = plat_of_remap_node("mtk,mt7621-sysc");
|
||||
--- a/arch/mips/ralink/timer-gic.c
|
||||
+++ b/arch/mips/ralink/timer-gic.c
|
||||
@@ -9,14 +9,14 @@
|
||||
|
||||
#include <linux/of.h>
|
||||
#include <linux/clk-provider.h>
|
||||
-#include <linux/clocksource.h>
|
||||
+#include <asm/time.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
void __init plat_time_init(void)
|
||||
{
|
||||
ralink_of_remap();
|
||||
-
|
||||
+ ralink_clk_init();
|
||||
of_clk_init(NULL);
|
||||
timer_probe();
|
||||
}
|
||||
--- /dev/null
|
||||
+++ b/include/dt-bindings/clock/mt7621-clk.h
|
||||
@@ -0,0 +1,18 @@
|
||||
+/*
|
||||
+ * Copyright (C) 2018 Weijie Gao <hackpascal@gmail.com>
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify
|
||||
+ * it under the terms of the GNU General Public License version 2 as
|
||||
+ * published by the Free Software Foundation.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#ifndef __DT_BINDINGS_MT7621_CLK_H
|
||||
+#define __DT_BINDINGS_MT7621_CLK_H
|
||||
+
|
||||
+#define MT7621_CLK_CPU 0
|
||||
+#define MT7621_CLK_BUS 1
|
||||
+
|
||||
+#define MT7621_CLK_MAX 2
|
||||
+
|
||||
+#endif /* __DT_BINDINGS_MT7621_CLK_H */
|
||||
Reference in New Issue
Block a user